The PXIe‑6674T generates and routes clock and trigger signals between devices in a PXI‑Express chassis and to other third-party PXI and PXI‑Express chassis or instruments. The PXIe‑6674T enables the use of high-performance PXIe‑DStarA, B, and C low‑voltage differential signaling (LVDS) trigger signals on PXI Express while providing full support for the PXI trigger lines. The PXIe‑6674T can generate two types of clocks, a highly stable 10MHz clock based on an onboard precision OCXO reference clock, and another clock using Direct Digital Synthesis (DDS) clock generation.
Product features:
- Bus Type: PXIe Timing
- Integrated clock: OCXO
- Integrated clock accuracy: 80 ppb
- Manual backplane clock change: Yes
- Protocol Support: —
- Clock Import: Yes
- Clock Export: Yes
- Zrigger access: PXI_DSTAR PXI_STAR PXI_TRIG